glip  0.1.0-dev
The Generic Logic Interfacing Project
VCU108 UART Loopback Demo

This demo implements a loopback in the device. Also a small demo using the pushbuttons, user DIP switch and GPIO LEDs is implemented.

Note
The VCU108 board provides only a rather slow UART chip. In theory, it should be able to provide up to 2 MBaud/s, but in our testing only speeds up to roughly 1 MBaud/s work reliably.

Prerequisites

For this demo you need:

Download and compile glip

If you have not done this before you need to download and build glip:

git clone https://github.com/TUM-LIS/glip.git
cd glip
./autogen.sh
mkdir build; cd build
../configure --enable-uart
make
sudo make install

Synthesize the design

Synthesize the example design with Xilinx Vivado.

cd GLIP_SOURCES/src/backend_uart/logic/demo/nexys4ddr
make vivado-project
vivado vivado/vcu108.xpr

In vivado run the implementation and generate the bitstream.

Configure the FPGA

When the bitstream has been succesfully generated, open the Hardware Manager in Vivado, turn the board on and program the device.

Execute the loopback measurement tool

Execute the GLIP tool "Loopback Measure" that measures the loopback performance.

The VC108 board provides a UART to serial bridge using the a Silicon Labs CP2105 Dual USB to UART Bridge Controller. This device provides two serial ports over one USB connection. Our demo uses the lower numbered serial port.

First, prepare the connection:

Now you can run the loopback measurement tool:

glip_loopback_measure -b uart -ospeed=921600,device=/dev/ttyUSB1

You should get around 75 KByte/s when running this test.

Notes for debugging